1. Technical Field
The invention relates generally to a magnetic random access memory (MRAM) and, more particularly, to an MRAM having a higher speed than static random access memory (SRAM), an integration density similar to that of dynamic random access memory (DRAM), and the properties of a nonvolatile memory such as flash memory.
2. Description of the Related Art
Semiconductor memory manufacturing companies have developed MRAM using a ferromagnetic material. Generally speaking, MRAM enables the reading and writing of digital information by forming multi-layer ferromagnetic thin films and sensing current variations based on the magnetization direction of the respective thin films. MRAM has a high speed, a low power consumption and a high integration density due to the special properties of the magnetic thin film and enables a nonvolatile memory operation similar to flash memory.
MRAM operates by using a giant magneto resistive GMR phenomenon or a spin-polarized magneto-transmission (SPMT) which is based on the manner in which spin influences electron transmission. MRAM based on GMR utilizes the phenomenon that resistance varies significantly when spin directions are different in two magnetic layers having a non-magnetic layer therebetween. On the other hand, MRAM based on SPMT utilizes the phenomenon that larger current transmission is generated when spin directions are identical in two magnetic layers having an insulating layer therebetween, thereby providing a magneto-transmission junction memory device. In any event, MRAM research is presently concentrated on the formation of multi-layer magnetic thin films and is not concerned with a unit cell structure and a peripheral sensing circuit.
FIG. 1 is a cross-sectional diagram illustrating a conventional MRAM. As shown in FIG. 1, a gate electrode 15, or first word line, is formed on a semiconductor substrate 11. A gate oxide film 13 is formed on an interface between the gate electrode 15 and the semiconductor substrate 11. Source and drain junction regions 17a and 17b are formed on the semiconductor substrate 11 at both sides of the first word line 15 to form a MOSFET, and a reference voltage line 19a and a first conductive layer 19b are formed to contact the source and drain junction regions 17a and 17b, respectively. The reference voltage line 19a and the first conductive layer 19b are formed simultaneously.
Thereafter, a first interlayer insulating film 21 is formed to planarize the top surface of the resultant structure, and a first contact plug 23 is formed to contact the first conductive layer 19b. A lower read layer 25, contacting the first contact plug 23, is formed by patterning a second conductive layer. A second interlayer insulating film 27 is formed on the top surface of the resultant structure and planarized to expose the upper portion of the lower read layer 25. A second word line or write line 29, is formed on one side of the second interlayer insulating film 27. A third interlayer insulating film 31 is formed to planarize the upper portion of the write line 29.
Thereafter, a contact hole is formed by removing the third interlayer insulating film 27 on an upper portion of the lower read layer 25, and a second contact plug 33 is formed in the contact hole to contact the lower read layer 25.
A seed layer 35 is formed on the third insulating layer 31 to contact the second contact plug 33. The seed layer 35 overlaps an upper portion of the second contact plug 33 and extends to overlap the upper portion of the write line 29.
A stacked structure includes a semi-ferromagnetic layer (not shown), a pinned ferromagnetic layer 39, a tunnel barrier layer 41 and a free ferromagnetic layer 43 are formed on the seed layer 35 to have a pattern size as large as the write line 29 and to overlap the write line 29, thereby forming a magnetic tunnel junction (MTJ) cell 49.
The semi-ferromagnetic layer prevents the magnetization direction of the pinned layer from being changed and, thus, the magnetization direction of the pinned ferromagnetic layer 39 is fixed in one direction. The magnetization direction of the free ferromagnetic layer 43 can be changed by generating a magnetic field, and information of ‘0’ or ‘1’ can be stored according to the magnetization direction of the free ferromagnetic layer 43.
A fourth interlayer insulating film 45 is formed over the resultant structure and planarized to expose the free ferromagnetic layer 45. An upper read layer, namely a bit line 47, is formed to contact the free ferromagnetic layer 45.
The unit cell of the MRAM includes one field effect transistor having the first word line 15 as a read line for reading information, the MTJ cell 49, the second word line 29, which is a write line that determines the magnetization direction of the MTJ cell 49 by forming an external magnetic field by applying a current, and the bit line 47, which is an upper read layer that detects the magnetization direction of the free layer by applying current to the MTJ cell 49 in a vertical direction.
During a read operation of the information from the MTJ cell 49, a voltage is applied to the first word line 15 to turn the field effect transistor on, and the magnetization direction of the free ferromagnetic layer 45 in the MTJ cell 49 is detected by sensing a magnitude of the current applied to the bit line 47.
During a write operation of the information in the MTJ cell 49, while maintaining the field effect transistor in an off state, the magnetization direction of the free ferromagnetic layer 45 is controlled by a magnetic field generated by applying current to the second word line 29 and to the bit line 47. When current is applied to the bit line 47 and the write line 29 at the same time, one cell at a vertical intersecting point of the two metal lines can be selected.
When the current flows in the MTJ cell 49 in a vertical direction, a tunneling current flows through an insulating layer. When the pinned ferromagnetic layer and the free ferromagnetic layer have the same magnetization direction, the tunneling current increases. On the other hand, when the pinned ferromagnetic layer and the free ferromagnetic layer have different magnetization directions, the tunneling current decreases. This is referred to as a tunneling magneto resistance (TMR) effect.
A decrease in the magnitude of the current due to the TMR effect is sensed and, thus, the magnetization direction of the free ferromagnetic layer is sensed, thereby detecting the information stored in the cell according to the magnetization direction.
As described above in the conventional MRAM, because the contact to the bit line is formed through the MTJ cell, the fabrication process is complicated, the resulting semiconductor memory device is not highly integrated due to an increased cell area and productivity is reduced.